News

In­aug­ur­al lec­ture of Bach­el­or thes­is by Elena Priss

Elena Priss gives her inaugural talk of the bachelor thesis on Monday, 1st April at 10:00am in Skype. The title of the bachelor thesis is: „On the Acceleration of SAT-based ATPG for FAST". The talk will be held in german. Everybody interested is invited to participate in the talk.

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Fi­nal present­a­tion of bach­el­or thes­is by Jan van den Heuvel

Jan van den Heuvel gives his final talk on Monday, 15th February, at 10:00am in Skype. The title of the bachelor thesis is: "Anwendung künstlicher neuronaler Netze zur Unterscheidung kleiner Verzögerungsfehler und Prozessvarianten". The talk will be held in german. Everybody interested is invited to participate in the talk.

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Al­ex­an­der Spren­ger, Somayeh Sade­ghi-Ko­han, and Jan Den­nis Re­imer re­ceived Out­stand­ing Stu­dent Pa­per Award

Alexander Sprenger, Somayeh Sadeghi-Kohan and Jan Dennis Reimer received an Outstanding Student Paper Award for their paper Variation-Aware Test for Logic Interconnects using Neural Networks – A Case Study during the 33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS20) Modern System-on-Chips are more and more affected by interconnect defects. Crosstalk defects lead to small delay faults and…

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Pa­per ac­cep­ted for IEEE In­ter­na­tion­al Test Con­fer­ence

The paper "Logic Fault Diagnosis of Hidden Delay Defects" from Stefan Holst, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich and Xiaoqing Wen was accepted as a conference paper at the IEEE International Test Conference. The paper is a result of a cooperation with the Kyushu Institute of Technology and the University of Paderborn. The conference will take place from November 3rd till November…

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Pa­per ac­cep­ted at "33rd IEEE In­ter­na­tion­al Sym­posi­um on De­fect and Fault Tol­er­ance in VLSI and Na­n­o­tech­no­logy Sys­tems"

The paper "Variation-Aware Test for Logic Interconnects using Neural Networks – A Case Study" from Alexander Sprenger, Somayeh Sadeghi-Kohan, Jan Dennis Reimer and Sybille Hellebrand was accepted at "33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS'20)". The conference will take place from October 19th till October 21st 2020.

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Present­a­tion in the re­search sem­in­ar

On Tuesday, August 18, Viktor Tran will give an intermediate talk about his Masters thesis "Pareto-Optimale, SAT-basierte Testmustererzeugung". The talk will be in German. It starts at 10am via Skype. Everyone interested is cordially invited to join!

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In­aug­ur­al lec­ture of the Bach­el­or thes­is by Melanie Jung

Melanie Jung gives her inaugural talk of the bachelor thesis on Monday, 18th May at 10:00am in Skype. The title of the bachelor thesis is: „SAT-based ATPG for test frequencies“. The talk will be held in german. Everybody interested is invited to participate in the talk.

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Pa­per ac­cep­ted for "32. GI / GMM / ITG - Work­shop Test­meth­oden und Zuver­lässigkeit von Schal­tun­gen und Syste­men (TuZ 2020)"

The paper "Multi-Frequency Method for Testing the Hidden Interconnect Defects" from Somayeh Sadeghi-Kohan and Sybille Hellebrand was accepted for the "32. GI / GMM / ITG - Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2020)" It takes place from February, 16th to February 18th in Ludwigsburg, Germany.

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Pa­per ac­cep­ted on IEEE VLSI Test Sym­posi­um

The paper "Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects" from Somayeh Sadeghi-Kohan and Sybille Hellebrand was accepted for the IEEE VLSI Test Symposium (VTS2020). It takes place from April, 4th to April 8th in San Diego, USA.

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Fi­nal present­a­tion by Jo­hann Emanuel Rhein­ert on Decem­ber 19th

The final presentation of the master thesis of Johann Emanuel Rheinert will take place on Thursday, December 19th at 9.30am in room P1.6.17.1. The title of his master thesis is: „Fault Tolerance Analysis of Approximate Artificial Neural Networks“. The talk will be held in english. Everybody interested is invited to participate in the talk.

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New em­ploy­ee in com­puter en­gin­eer­ing group

Since November 4th, 2019 Jan Dennis Reimer supports our computer engineering group as research assistant. He got his master’s degree at Paderborn University. He completed his master thesis with the topic "SAT-basierte Modellierung und Analyse von Verzögerungsfehlern mit variabler Größe" in our computer engineering group. During his master studies he worked on fault emulation for the Leon3-Processor, and on SAT-based ATPG for…

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Fi­nal present­a­tion on Oc­to­ber 31st, giv­en by Yuan Zhang

Yuan Zhang fill give his final presentation on his master thesis with the topic Convolutional Compaction for Faster-than-At-Speed-Test (FAST) on Thursday, October 31st, at 9.30am in room P1.6.17.1. The talk will be given in english. Everyone interessted is invited to participate in the talk.

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Pre­lim­in­ary course meet­ing for winter term 2019/2020

On Tuesday, October 8th, the preliminary course meeting for seminars and project groups in this winter term takes place. It is being held at 2pm in our seminar room (P1.6.17.1).

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Present­a­tions in the Re­search Sem­in­ar

On Thursday, September 26, 2019, two presentations are being held as part of our research seminar. The presentations start at 9am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join!

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In­ter­me­di­ate present­a­tion dur­ing re­search sem­in­ar on 22.08.2019

Yuan Zhang will give an intermediate presentation on his master thesis on Thursday, August 22nd at 9.30 am. The topic of his thesis is "Convolutional Compaction for Faster-than-At-Speed-Test (FAST)" The presentation takes place at 9.30 am in our seminar room (P1.6.17.1) and will be given in englisch. Everyone interesseted is invited to participate.

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