News

Present­a­tion in our re­search sem­in­ar

On Thursday, May 3rd, Moritz Schniedermann will give an intermediate talk about his masters thesis SAT-basierte Testmustererzeugung für Verzögerungsfehler (in German). The talk will be held at 9:30am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join the talk!

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In­ter­im Talk

On Wednesdey, April 18th at 9.30am Manuel Boschman will give an interim talk on his bacheor thesis Implementierung und Analyse eines rekonfigurierbaren X-toleranten Signaturregisters The talk will take place in room P1.6.16.2

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Res­ults for ex­am on "In­tro­duc­tion to Al­gorithms"

The results of the exam "Introduction to Algorithms" from March 26 are now published in the display case in front of P1.6.08. The exam review will be held on Thursday, April 12, from 2pm-3pm in P1.6.17.1.

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Pre­lim­in­ary course meet­ing for sum­mer term 2018

On Tuesday, April 10th, the preliminary course meeting for seminars in this summer term takes place. It is being held at 2pm in our seminar room (P1.6.17.1). Further information can be found in the corresponding PANDA course.

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GTI / GRA Klausurergeb­n­isse

Die vorläufigen Ergebnisse der GRA Klausur vom 13.02.2018 und der GTI Nachschreibeklausur vom 15.03.2018 sind nun im zugehörigen koaLA-Kurs verfügbar. Die Klausureinsicht der Klausuren findet am Donnerstag, 12.04.2018 um 10:00 Uhr im Raum P1.6.17.1 statt.

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Con­fer­ence-Pa­per ac­cep­ted

The Conference-Paper of Alexander Sprenger and Sybille Hellebrand with the Topic: Tuning Stochastic Space Compaction to Faster-than-At-Speed Test was accepted at "21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)". Alexander Sprenger willl present the work in Budapest on April 25th.

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Poster present­a­tion on work­shop

On Monday, 5 March 2018, Alexander Sprenger presented a poster on the supbject Stochastic compaction for the high speed test at the 30th GI / GMM / ITG Workshop "Test Methods and Reliability of Circuits and Sytems" in Freiburg.

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In­aug­ur­al present­a­tion by Manuel Boschmann

Manuel Boschmann will hold the inaugural lecture of his bachelor thesis on Wednesday, 31.01.2018 at 13:30h with the topic "Implementation and Analysis of a Reconfigurable X-canceling MISR". The lecture will take place in our seminar room (P1.6.17.1). All interested are cordially invited!

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Present­a­tion in re­search sem­in­ar

On Thursday, December 14th, Thomas Mertens will give the final presentation of his Bachelors thesis titled Experimenteller Vergleich von Kompaktierungsstrategien für den eingebetteten Hochgeschwindigkeitstest. The talk will start at 9am (Attention: Changed time!). Everyone interested is cordially invited to join!

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Present­a­tions in our re­search sem­in­ar

On Thursday, December 7, the following talks will be given as part of our research seminar: Jan Dennis Reimer will talk about his work as a student assistant in our group Moritz Schniedermann will give an intermediate talk about the state of his masters thesis SAT-basierte Testmustererzeugung für Verzögerungsfehler The talks will start at 11am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join!

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Journ­al pa­per sub­mis­sion ac­cep­ted

Matthias Kampmann and Sybille Hellebrand got their submission "Design for Small Delay Test - A Simulation Study" to the journal "Microelectronics Reliability", published by Elsevier, accepted. In their submission, the authors further analyze the proposed "Design-for-FAST" architecture, which they previously published in the award-winning paper "Design-for-FAST: Supporting X-tolerant Compaction during Faster-than-at-Speed Test". They integrated…

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New top­ics for theses

There are new topics for theses (Bachelors or Masters theses) available. You can find the list of open topics here: Theses in the research group If you are interested in writing a thesis at our research group, please contact our research assistants! Note also our guidelines for writing a thesis.

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New em­ploy­ee in the field of Com­puter En­gin­eer­ing

Since mid-September 2017, Mohammad Urf Maaz has been a new employee in the filed of Computer Engineering. He studied "Electrical System Engineering" at the University of Paderborn and gained experience in the field during his Master's thesis. As part of the DFG project FAST (Faster-than-At-Speed Test), he is now continuing his work on X-tolerant compaction procedures as a doctoral student.

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