News

Art­icle ac­cep­ted for Journ­al of Cir­cuits, Sys­tems and Com­puters

The Article "Divide and Compact — Stochastic Space Compaction for Faster-than-at-Speed Test" written by Alexander Sprenger and Sybille Hellebrand was accepted by the Journal of Circuits, Systems and Computers.

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Present­a­tion in the Re­search Sem­in­ar

On Thursday, January 17th 2019, Jan Dennis Reimer will give the final talk about his project "Eine zeitbasierte SAT-Testmusterzeugung für kleine Verzögerungsfehler" (in German). The talk will start at 9:30am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join. Back to the list

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Work­shop con­tri­bu­tion ac­cep­ted

The paper "A Hybrid Space Compactor for Varying X-Rates" from Mohammad Urf Maaz, Alexander Sprenger and Sybille Hellebrand is accepted for the 31.GI/GMM/ITG - Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2019).

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Present­a­tion in the Re­search Sem­in­ar

On Thursday, January 10th 2019, Mohammad Urf Maaz will give a talk about process variations and statistical timing analysis of digital circuits. The talk will start at 9:00am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join!

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Present­a­tion in the re­search sem­in­ar

On Thursday, December 13th, Viktor Tran will give the inaugural lecture on his master's theseis on pareto-optimales SAT-ATPG. The lecture will take place at 9:30 in our seminar room (P1.6.17.1). All interested are cordially invited to!

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Present­a­tion in the re­search sem­in­ar

On Thursday, November 11th, Mehak Aftab will give an interim lecture on her master's thesis X-ware Pattern Selection for Faster-than-at Speed Test. The lecture will take place at 9:30 in our seminar room (P1.6.17.1). All interested are cordially invited!

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Present­a­tion in the re­search sem­in­ar

On October 11th, Dennis Reimer will give an intermediate talk about his project Zeitlich genaue SAT-basierte Testmustererzeugung. The talk will start at 9:30 am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join!

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Sub­mis­sion to Work­shop Ac­cep­ted

Matthias Kampmann and Sybille Hellebrand successfully submitted their contribution Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test to the IEEE "Workshop on RTL and High-Level Testing" (WRTLT). Matthias Kampmann will present the paper in October in China.

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2. Klausur­ter­min Grundla­gen der Rech­ner­ar­chitek­tur

Am Donnerstag, den 13.09.2018 findet der 2. Klausurtermin der Veranstaltung "Grundlagen der Rechnerarchitektur" statt.

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Present­a­tion on Au­gust 1st

Manuel Boschmann will give his final talk on his bachelor thesis with the title: Implementierung und Analyse eines rekonfigurierbaren X-toleranten Signaturregisters on Wednesday, August 1st at 2pm in room P1.6.17.1. Everyone interested is invited to participate.

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Journ­al Pa­per Ac­cep­ted

Matthias Kampmann and Sybille Hellebrand successfully submitted their article Built-in Test for Hidden Delay Faults, created in cooperation with Michael Kochte, Chang Liu, Eric Schneider and Hans-Joachim Wunderlich from the University of Stuttgart, to the IEEE journal "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems". The article will be published soon.

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Present­a­tion in the re­search sem­in­ar

On Thursday, July 5th, Moritz Schniedermann will give his final presentation about his Masters Thesis SAT-basierte Testmustererzeugung für Verzögerungsfehler (in German). The talk will take place at 9:30am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join!

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Present­a­tions in the re­search sem­in­ar

On Thursday, June 6th, the following talks will be given as part of our research seminar: - Mehak Aftab will give her introductory talk about her Masters Thesis X-Aware Pattern Selection for Faster-than-at-Speed Test - Viktor Tran and Jan Dennis Reimer will give their final presentation of their group project Fehleremulation für den Software-basierten Selbsttest - Eine experimentelle Evaluation für den Leon3-Prozessor The talks will start…

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Al­ex­an­der Spren­ger and Sybille Hel­l­eb­rand re­ceived Best Pa­per Award

Alexander Sprenger and Sybille Hellabrand received the "Best Paper Award in the Area of Test" for their paper "Tuning Stochastic Space Compaction to Faster-than-At-Speed Test" during the "21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems" (DDECS) in Budapest.

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Present­a­tion in our re­search sem­in­ar

On Thursday, May 3rd, Moritz Schniedermann will give an intermediate talk about his masters thesis SAT-basierte Testmustererzeugung für Verzögerungsfehler (in German). The talk will be held at 9:30am in our seminar room (P1.6.17.1). Everyone interested is cordially invited to join the talk!

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