Rakib Khan Pathan presents his master thesis on Tuesday, 18.11.2025 at 16:00 in our seminar room. The master thesis is titled:
„Neural Network based Waveform Simulation of Digital Circuits“.
The presentation will be given in English. Everyone who is interested is welcome to attend the session.
Abstract: This work presents a new approach to switch-level circuit timing simulation using a Neural Network (NN), which is both efficient and accurate. A Multi-Layer Perceptron (MLP) based NN is trained on SPICE simulation data to predict voltage waveforms at each time step. The model uses operating conditions, recent input features, and the previous output to generate the following predicted output voltages. To evaluate the cells of the circuits, an algorithm is developed that repeatedly applies the neural network. The developed cell model is then applied to a circuit-level procedure that also predicts the voltage waveform. After evaluation, a comprehensive analysis of the neural network model is conducted to validate its accuracy and performance at the circuit level. The results show that the NN-based waveform simulator approximates SPICE behavior and efficiently maintains accuracy at the circuit level.
